SiC Coated Wafer Carrier

Name: SiC Coated Wafer Carrier
Brand: SiC Graphite
SKU: sic-coated-wafer-carrier
Availability: InStock
Rating: 4.9 (24 reviews)

SiC coated planetary wafer carriers for MOCVD systems. Precision-machined pockets ensure uniform wafer heating and gas flow dynamics for consistent epitaxial growth.

Target Buyer:Epi-foundry procurement and fab process teams.

SiC coated graphite wafer carrier for epitaxy reactors 1

Capability Highlights

Precise pocket dimensions
High-density SiC coating
Long service life in corrosive environments

Typical Applications

GaN/SiC Epitaxy
MOCVD Planetary Reactors

Engineering Focus

Pocket depth and flatness tolerance
Rotational balance
Coating integrity in pockets

Key Evaluation Matrix

Metric	Typical Range	Why It Matters
Pocket Flatness	< 0.05 mm	Critical for wafer temperature uniformity.
Coating Uniformity	Thickness map or coupon check by project	Thin edges or pockets become the first failure point in corrosive epitaxy gases.
Base Graphite Match	CTE and density matched to CVD SiC coating	Poor substrate matching drives coating cracks, peeling, and exposed graphite.
Surface Finish	Ra target specified for wafer pocket or sealing surface	Surface finish affects wafer slip, particle risk, and thermal uniformity.

Engineering Datasheet

Product-Level Technical Specifications

Values below are RFQ planning targets, not blanket guarantees. Final acceptance criteria should be frozen against drawings, process conditions, equipment model, and buyer qualification requirements.

Parameter	Target / Typical Scope	Engineering Note
Carrier architecture	Single-pocket or multi-pocket graphite carrier with CVD SiC coating	Pocket count, pocket pitch, and carrier OD must match the reactor handling and rotation system.
Wafer size	2 inch to 8 inch class projects by drawing review	Larger wafer formats increase sensitivity to pocket depth, flatness, and thermal uniformity.
Pocket flatness	CTQ flatness defined by wafer-contact area	Flatness affects wafer heating uniformity, slip risk, and epitaxial thickness repeatability.
Pocket depth and edge profile	Drawing-defined depth, radius, bevel, notch, or flat features	Edge geometry should protect wafers while preserving gas flow and handling clearance.
Coating thickness	Typical 80-120 um; adjusted for pocket and edge coverage	Pockets, holes, and hidden surfaces require feasibility review before coating release.
Rotational balance	Reviewed by geometry, mass distribution, and pocket layout	Carrier imbalance can affect high-speed MOCVD rotation and process repeatability.

Trace Impurity Review Table

Semiconductor programs should define restricted elements before sample production. The table helps procurement and process teams turn purity expectations into a measurable qualification file.

Element	Typical Limit	Why Controlled
Na / Al	Buyer-defined trace limits	Important for wafer-contact carrier programs where contamination risk is scrutinized.
Fe / Ni / Cr	Project-specific ppm or ppb boundary	Metal contamination can trigger qualification rejection in epitaxy programs.
Ca / Mg	Restricted where surface contamination is buyer critical	Often included in buyer trace-element tables for clean carrier handling.
B / V / Ti	Defined by process and substrate sensitivity	Relevant for SiC, GaN, and power-device programs that control dopant or metallic backgrounds.

RFQ Evidence Package

These records reduce ambiguity before sample approval and repeat-order release.

Pocket layout drawing with wafer diameter, pocket depth, flatness, edge radius, and datum references.
Coating map for pockets, backside, outer diameter, holes, and masked interfaces.
First-article CTQ inspection for pocket geometry, carrier OD, thickness, and flatness.
Visual coating inspection and surface acceptance photos for wafer-contact areas.
Clean bagging, separators, and export packing records to protect coated pocket surfaces.

Equipment Compatibility Review

Compatibility should be treated as an engineering review, not a catalog claim. Equipment-family language helps buyers route the RFQ, while final production still depends on drawings, samples, coating allowance, and acceptance criteria.

Equipment Family	Compatible Part Scope	Buyer Validation Required
Veeco TurboDisc-style MOCVD platforms	SiC coated graphite wafer carriers and multi-pocket carrier plates.	Confirm pocket count, wafer diameter, carrier OD, backside support, rotation interface, and used-part reference.
Aixtron AIX G5+ C-style planetary reactors	Planetary carriers, satellite-style carrier plates, rings, and custom pocket geometries.	Confirm satellite layout, pocket depth, edge profile, coating boundary, and handling features.
Custom GaN / SiC epitaxy reactors	Drawing-based wafer carriers, dummy carriers, and coated graphite process fixtures.	Confirm reactor interface, wafer type, cleaning chemistry, process gas, and lifetime target.

Open full OEM compatibility matrix

Product Selection Logic

Decision Factor	Selection Logic	Buyer Check
Corrosive process gas	Choose CVD SiC coated graphite for MOCVD, epitaxy, HCl, NH3, or particle-sensitive wafer handling.	Specify gas environment, wafer size, equipment model, and lifetime target.
Coating feasibility	Deep pockets, blind holes, sharp edges, and hidden surfaces may need DFM changes before coating.	Ask for coating-thickness targets and note surfaces that must remain uncoated.
Substrate match	Base graphite must be chosen for CTE, density, and surface quality, not only machining cost.	Confirm CTE matching logic and first-article visual/coating inspection scope.

Manufacturing and QC Flow

Stage	Production / QC Checkpoint	Buyer Evidence
1. Coating DFM	Review pockets, blind areas, edges, masked surfaces, and coating-thickness target.	Marked drawing with coated, uncoated, and critical wafer-contact surfaces.
2. Substrate machining	Machine graphite substrate with CTE, density, and surface preparation matched to CVD SiC.	Base material selection note and pre-coating inspection record.
3. CVD SiC coating	Deposit dense SiC coating with attention to pockets, edges, and thermal-stress risk.	Coating thickness target and inspection method agreed before production.
4. Final inspection	Check visible defects, coating continuity, dimensions, and wafer-contact surfaces.	Inspection report, photos, or coupon result depending on order scope.
5. Clean export packing	Protect polished or coated surfaces from abrasion, fingerprints, and impact.	Individual wrapping, separators, and packing photos.

RFQ Checklist

Specify wafer size (e.g., 6-inch, 8-inch)
Provide pocket layout/drawing
Specify target equipment

Risk Controls

Wafer slip/scratching: Optimized pocket profile and surface roughness control.

Product Gallery

Multi-pocket SiC coated graphite wafer carrier

MOCVD graphite tray with SiC coating for wafer support

Buyer FAQ

Can you manufacture carriers for 8-inch SiC epi?

Yes, we can review machining feasibility for large-diameter multi-pocket carriers based on drawings and tolerance requirements.

What is the most common cause of SiC coating failure?

Early failure usually comes from substrate mismatch, coating shadow areas, sharp edges, or thermal cycling that creates cracks and exposes the graphite base.

Do all surfaces need the same SiC coating thickness?

No. Wafer-contact areas, gas-facing surfaces, edges, and masked interfaces should be marked on the drawing before the CVD coating route is finalized.

What evidence should a buyer request for coated parts?

Ask for agreed coating-thickness checks, visual defect inspection, critical dimensional checks after coating, and clean packing photos for sensitive surfaces.

Related Resources

Procurement Next Steps

Compare the full product portfolio before locking material architecture.
Match the part to a process solution for thermal-field and contamination constraints.
Review OEM capability controls for machining, coating, purification, and export packaging.
Send a drawing-based RFQ with process, material grade, tolerances, quantity, and delivery target.

Inquiry Email

[email protected]

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Include process, product type, drawing status, purity/coating target, dimensions, quantity forecast, operating conditions, and delivery date.

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